Monday, November 23, 2009

NEXT STEPS

After the encoder now the next step is decoder module. But as my project is completly defined,these are the aim for the next few weeks:

1)Develop a Decoder module ,merge with encoder and finish the CODEC BLOCK .

2)Try to implement a Linux Kernel on a VIRTEX 2 PRO fpga with a power pc processor

3)Make the 'CODEC BLOCK' as a peripheral and implement alongside the powerpc

4) Write a Device Driver for the CODEC BLOCK

Sunday, November 15, 2009

Testing of Flexray Encoder

AIM:

To test the Flexray encoding algorithm ,the VHDL code is synthesized and programmed into a FPGA . The FPGA is then connected to an Oscilloscope with an inbuilt FLEXRAY decoder. The FPGA is programmed to send a single frame to the oscilloscope for every 5 seconds.

Expected Results:

The frame encoded and sent to the Oscilloscope should be decoded properly and the frame parameters should be displayed on the oscilloscope.

APPARATUS USED :


1)
Spartan 3E FPGA kit with a 50 MHz onboard clock
2) TEKTRONIX DPO4000 oscilloscope.

ASSUMPTIONS:

Even though the actual FLEXRAY frame is transmitted at 10 Mbps , in this experiment the frame is transmitted at 6.25 Mbps due to the limitation on the onboard oscillator.

RESULTS:

The experiment was performed on 4 th Novemeber.

The FLEXRAY frame was transmitted and successfully decoded by the oscilloscope and the frame paramenters were printed on the screen.

The images of oscilloscope screenshots and the setup is given below.The oscilloscope is connected to the computer via an ethernet cable so the oscilloscope screen is available on a web browser.
(Please Click on the images for larger image)

1) Starting Of the flexray frame.



2)Frame Parmameters




3)The decoded frame and the parameters of the frame are given on the oscilloscope.The data transmitted data and the decoded data matches.


4)Setup of the Experiment.




Friday, October 16, 2009

Flexray WaveForm Comparison

In this i will post two waveforms. The top waveform is the simulated waveform from the RTL synthesis of VHDL code. The second waveform is the actual flexray static frame waveform. We can see that the two waveforms are identical .

Please click on the image for clear image.

The comparison between the simulated waveform and the example wave form shows that the designed system is working as expected.

FLEXRAY CODEC BLOCK

The "CODEC" block basically decodes or encodes the flexray frames. The encoder basically gets the raw frames from a user RAM or from a controller and then encodes the frame according to the flexray protocol.

So to begin with i will first build a flexray transmitter . This module is basically an encoder .The Flexray frame resides in a RAM. This unit copies the RAM content one by one and then simulatniously transmits each bit of the frame serially.It also appends 3 bits

1)TSS(Transmit Start Sequence)
2)FSS(Frame Start Sequence)
3)BSS-starting of every byte of frame(Byte Start Sequence)

The basic block diagram is shown below:-


The above block is realized in VHDL and its RTL synthesis is done in XILINX 8.1. The synthesis thus produced is verified by comparing the simulation result to an example flexray waveform.

Thursday, September 10, 2009

Project Definition

My project title is "IMPLEMENTATION OF FLEXRAY ON FPGA FOR CONTROL AND MEDIA APPLICATIONS"


The entire flexray module as specified in the Flexray Spec Sheet is made of many modules as shown below

Therefore to start off with the implementation of flexray on FPGA , i start by taking a block and implementing it in FPGA.
So the first block i start is the "CODEC BLOCK" which performs the coding and decoding of flexray frames.

Tuesday, September 8, 2009

INTRODUCTION

This blog is created to keep track of my project . I am a student doing my masters from IIT Delhi.

This is my first post