NEXT STEPS

After the encoder now the next step is decoder module. But as my project is completly defined,these are the aim for the next few weeks:

1)Develop a Decoder module ,merge with encoder and finish the CODEC BLOCK .

2)Try to implement a Linux Kernel on a VIRTEX 2 PRO fpga with a power pc processor

3)Make the 'CODEC BLOCK' as a peripheral and implement alongside the powerpc

4) Write a Device Driver for the CODEC BLOCK

Testing of Flexray Encoder

AIM:

To test the Flexray encoding algorithm ,the VHDL code is synthesized and programmed into a FPGA . The FPGA is then connected to an Oscilloscope with an inbuilt FLEXRAY decoder. The FPGA is programmed to send a single frame to the oscilloscope for every 5 seconds.

Expected Results:

The frame encoded and sent to the Oscilloscope should be decoded properly and the frame parameters should be displayed on the oscilloscope.

APPARATUS USED :


1)Spartan 3E FPGA kit with a 50 MHz onboard clock
2) TEKTRONIX DPO4000 oscilloscope.

ASSUMPTIONS:

Even though the actual FLEXRAY frame is transmitted at 10 Mbps , in this experiment the frame is transmitted at 6.25 Mbps due to the limitation on the onboard oscillator.

RESULTS:

The experiment was performed on 4 th Novemeber.

The FLEXRAY frame was transmitted and successfully decoded by the oscilloscope and the frame paramenters were printed on the screen.

The images of oscilloscope screenshots and the setup is given below.The oscilloscope is connected to the computer via an ethernet cable so the oscilloscope screen is available on a web browser.
(Please Click on the images for larger image)

1) Starting Of the flexray frame.



2)Frame Parmameters




3)The decoded frame and the parameters of the frame are given on the oscilloscope.The data transmitted data and the decoded data matches.


4)Setup of the Experiment.